Description (AMM 22-01-10/22-11-01)

 

Two flight control computers, designated as A and B, are mounted in the  E1-3 shelf in the electrical and electronics equipment bay. The units provide system computation and associated output control and indication for autopilot, flight director, mach trim, speed trim, and altitude alert. The units also contain BITE programs and associated memory for detecting and storing DFCS fault data.

 

A- The purpose of the flight control computer (FCC) is to accept input mode and sensor signals, process them, and provide command outputs to the aileron, elevator, and stabilizer control surfaces. The two FCC's are identical and interchangeable.

 

B- Two flight control computers (FCC) designated as A and B are mounted on the E1-3 shelf in the electrical and electronics equipment bay. The units are retained in the rack by cam-loc handles located on the front of the unit which engage adjustable rack-mounted swivel bolts. The flight control computers are standard 1 ATR-long boxes. Electrical connections to the units are provided by four DPX2 connectors located on the rear of the unit which mate with rack-mounted DPX2 connectors. Three capped test connectors and a cooling fan are located on the front panel of the flight control computers.

 

C- The FCC contains keyed plug-in printed circuit cards which are installed vertically within the unit. The cards have built in lever assist handles for ease of removal. The unit power supply consists of plug-in cards located across the rear of the unit. The electronic circuitry on the boards are latest state-of-the-art design with solid state micro-electronics used extensively.

 

D- The FCC interfaces with analog and digital data signals. The mode computation is performed by the digital computer. Analog to digital (A/D) and digital to analog (D/A) converters within the computer provide system compatability. The computer is designed to interface with ARINC 429 digital data.

 

E- Airplane compatibility is determined by the three option pins in the FCC. These pins shall be used to compare against the allowable combinations of FCC and the airplane. The failure to pass the compatibility check shall result in the computer failing the power up test. The airplane compatibility is displayed on the CDU in the standard option pins table (AMM 22-11-01/501, Digital Flight Control System - Adjustment/Test).

 

F- Operation of the FCC (Fig. 2) is centered around two digital processors. The CPU 1 processor performs most mode logic and control while CPU 2 does parallel computations for dual-channel autoland functions and provides the pitch inner loop and limiting functions. Computations are split between the two processors to preclude one processor failure from causing a simultaneous roll and pitch Autopilot hardover. Control and logic calculations are shared between the processors for critical applications. All signals to and from the FCC and data transferred between the processors are controlled by a direct memory access controller.

 

G- The inputs, data valids, and existing logic states are combined in logic software to compute the current operating mode states. The selected software generates autopilot commands for output to the airplane control surfaces, and Flight Director commands for output to the pitch and roll F/D bars.

 

H- The CPU 1 software executes periodic self-tests to detect failures in software execution or in RAM or ROM access. During autoland and autopilot go-around modes, CPU 1 software monitors surface commands generated by CPU 2 for comparison with CPU 1 commands (and visa versa) to detect unacceptable discrepancies. Failure in the self-test or in cross-CPU redundancy monitoring are recorded by the continuous monitor.

 

I- System A interfaces with system A electrical power, system A hydraulic power and the captain's instruments, attitude, compass, air data and navigation systems. System B interfaces with system B electrical power, system B hydraulic power and the first officers instruments, attitude, compass, air data and navigation systems. The systems are isolated to provide two completely independent systems. Both systems operate simultaneously during dual channel approach mode.